may 2000 bss84 / bss110 p -channel enhancement mode field effect transistor general description features ____________________________________________________________________________________________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter bss84 bss110 units v dss drain-source voltage -50 v v dgr drain-gate voltage (r gs < 20 k w ) -50 v v gss gate-source voltage - continuous 20 v i d drain current - continuous @ t a = 30/35 o c -0.13 -0.17 a - pulsed @ t a = 2 5 o c -0.52 -0.68 p d maximum power dissipation t a = 25 c 0.36 0.63 w t j ,t stg operating and storage temperature range -55 to 15 0 c t l maximum lead temperature for soldering purposes, 1/16" from case for 10 seconds 300 c thermal characteristics r q ja thermal resistance, junction-to-ambient 350 200 c/w bss84 rev. c2 / bss110. rev. a3 these p-c hannel enhancement mode power field effect transistors are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. they can be used, with a minimum of effort, in most applications requiring up to 0.17a dc and can deliver pulsed currents up to 0.68a. this product is particularly suited to low voltage applications requiring a low current high side switch. bss84: -0.13a, -50v. r ds(on ) = 10 w @ v gs = -5v. bss110: -0.17a, -50v. r ds(on ) = 10 w @ v gs = -10v voltage controlled p-channel small signal switch. high density cell design for low r ds(on) . high saturation current . s d g ? 2000 fairchild semiconductor corporation bss84 bss110 (to-236ab)
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions typ e min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a all -50 v i dss zero gate voltage drain current v ds = -50 v , v gs = 0 v all -15 a t j = 125c -60 a v ds = -25 v , v gs = 0 v -0.1 a i gssr gate - body leakage, reverse v gs = -20 v, v ds = 0 v all -10 na on characteristics (note 1) v gs (th) gate threshold voltage v ds = v gs , i d = -1 ma all -0.8 -1.75 -2 v r ds(on) static drain-source on-resistance v gs = -5v, i d = -0.10 a bss84 3.2 10 w v gs = -10 v, i d = -0.17 a bss110 2.2 10 g fs forward transconductance v ds = -25 v, i d = -0.10 a bss84 0.05 0.27 s v ds = -10 v, i d = -0.17 a bss110 0.05 0.29 dynamic characteristics c iss input capacitance v ds = -25 v, v gs = 0 v, f = 1.0 mhz bss84 37 45 pf bss110 37 40 c oss output capacitance all 16 25 pf c rss reverse transfer capacitance all 5 12 pf switching ch aracteristics (note 1) t d(on) turn - on delay time v dd = -30 v, i d = -0.27 a , v gs = -10 v, r gen = 50 w all 12 ns t r turn - on rise time all 50 ns t d(off) turn - off delay time all 10 ns t f turn - off fall time all 25 ns drain-source diode characteristics i s continuous source diode current bss84 -0.13 a bss110 -0.17 i sm maximum pulsed source diode current (note 1) bss84 -0.52 a bss110 -0.68 v sd drain-source diode forward voltage v gs = 0 v, i s = -0.26 a (note 1) bss84 -0.95 -1.2 v v gs = 0 v, i s = -0.34 a (note 1) bss110 -1 -1.2 note: 1. pulse test: pulse width < 300 m s, duty cycle < 2.0%. bss84 rev. c2 / bss110. rev. a3
bss84 rev. c2 / bss110. rev. a3 -6 -5 -4 -3 -2 -1 0 -1 -0.8 -0.6 -0.4 -0.2 v , drain-source voltage (v) i , drain-source current (a) v = -10v gs ds d -8.0 -4.0 -6.0 -5.0 -4.5 -3.5 -2.5 -3.0 -1 -0.8 -0.6 -0.4 -0.2 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance v = -3v gs d r , normalized ds(on) -3.5 -4.5 -5.0 -6.0 -10 -4.0 -8.0 figure 1. on-region characteristics figure 2. on-resistance variation with drain current and gate voltage typical electrical characteristics -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) i = -0.13a v = -10v d gs -1 -0.8 -0.6 -0.4 -0.2 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance t = 125c j d r , normalized ds(on) 25c -55c v = -10v gs figure 3. on-resistance variation with temperature figure 4. on-resistance variation with drain current and temperature -8 -6 -4 -2 0 -1 -0.8 -0.6 -0.4 -0.2 v , gate to source voltage (v) i , drain current (a) 25c 125c v = -10v ds gs d t = -55c j -50 -25 0 25 50 75 100 125 150 0.85 0.9 0.95 1 1.05 1.1 t , junction temperature (c) gate-source threshold voltage j v = v i = -1ma d ds gs v , normalized th figure 5. transfer characteristics figure 6. gate threshold variation with temperature
bss84 rev. c2 / bss110. rev. a3 -50 -25 0 25 50 75 100 125 150 0.9 0.95 1 1.05 1.1 t , junction temperature (c) drain-source breakdown voltage i = -250a d bv , normalized dss j 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0.001 0.005 0.01 0.05 0.1 0.2 0.5 1 -v , body diode forward voltage (v) -i , reverse drain current (a) v = 0v gs t = 125c j 25c -55c sd s figure 7. breakdown voltage variation with temperature figure 8. body diode forward voltage variation with source current and temperature typical electrical characteristics (continued) 0 0.5 1 1.5 2 0 2 4 6 8 10 q , gate charge (nc) -v , gate-source voltage (v) g gs v = -10v ds i = -0.13a d -20v -40v 0.1 0.2 0.5 1 2 5 10 20 30 50 2 3 5 10 20 30 50 70 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 9. capacitance characteristics figure 10. gate charge characteristics g d s v dd r l v v in out v gs dut r gen 10% 50% 90% 10% 90% 90% 50% v in v out on off d(off) f r d(on) t t t t t t inverted 10% pulse width figure 11. switching test circuit figure 12. switching waveforms
bss84 rev. c2 / bss110. rev. a3 -1 -0.8 -0.6 -0.4 -0.2 0 0.1 0.2 0.3 0.4 0.5 i , drain current (a) g , transconductance (siemens) t = -55c j d fs v = -10v ds 125c 25c 1 2 5 10 20 30 50 80 0.005 0.01 0.05 0.1 0.5 1 2 - v , drain-source voltage (v) -i , drain current (a) ds d v = -10v single pulse t = 25c gs a rds(on) limit 100ms 1ms 10ms dc 1s 100us 10s figure 13. transconductance variation with drain current and temperature figure 14. maximum safe operating area typical electrical characteristics (continued) 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.01 0.05 0.1 0.2 0.5 1 t , time (sec) t r a n s i e n t t h e r m a l r e s i s t a n c e r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t /t 1 2 r (t) = r(t) * r r = 350 c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 o figure 15. transient thermal response curve note : characterization performed using a circuit board with 175 o c/w typical case-to-ambient thermal resistance .
january 2000, rev. b to-92 package dimensions to-92; to-18 reverse lead form (j35z option) (fs pkg code 92, 94, 96) 1:1 scale 1:1 on letter size paper dimensions shown below are in: inches [millimeters] part weight per unit (gram): 0.22 note: all package 97 or 98 transistors are leadformed to this configuration prior to bulk shipment. order l34z option if in-line leads are preferred on package 97 or 98. * * ; * standard option on 97 & 98 package code
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